# perf test -v 'Parsing of PMU event table metrics'
10: PMU events                                                      :
10.3: Parsing of PMU event table metrics                            :
--- start ---
test child forked, pid 4158
Using CPUID AuthenticAMD-25-11-1
Found metric 'BAClear_Cost'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
CPU_CLK_UNHALTED.THREAD not found
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
cycles not found
Found metric 'DSB_Coverage'
Found metric 'GFLOPs'
Found metric 'IFetch_Line_Utilization'
Found metric 'ILP'
UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC not found
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'Kernel_Utilization'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
L1D_PEND_MISS.PENDING_CYCLES not found
Found metric 'Page_Walks_Utilization'
cycles not found
Found metric 'SLOTS'
cycles not found
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'power_channel_ppd %'
Found metric 'power_critical_throttle_cycles %'
Found metric 'power_self_refresh %'
Found metric 'freq_max_limit_thermal_cycles %'
Found metric 'freq_max_os_cycles %'
Found metric 'freq_max_power_cycles %'
Found metric 'freq_trans_cycles %'
Found metric 'power_state_occupancy.cores_c0 %'
Found metric 'power_state_occupancy.cores_c3 %'
Found metric 'power_state_occupancy.cores_c6 %'
Found metric 'prochot_external_cycles %'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'BpTB'
Found metric 'Branch_Misprediction_Cost'
Found metric 'Branch_Misprediction_Cost_SMT'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'FLOPc_SMT'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'GFLOPs'
Found metric 'IFetch_Line_Utilization'
Found metric 'ILP'
UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC not found
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpB'
Found metric 'IpCall'
Found metric 'IpL'
Found metric 'IpMispredict'
Found metric 'IpS'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'Page_Walks_Utilization_SMT'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'BpTB'
Found metric 'Branch_Misprediction_Cost'
Found metric 'Branch_Misprediction_Cost_SMT'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'FLOPc_SMT'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'GFLOPs'
Found metric 'IFetch_Line_Utilization'
Found metric 'ILP'
UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC not found
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpB'
Found metric 'IpCall'
Found metric 'IpL'
Found metric 'IpMispredict'
Found metric 'IpS'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'Page_Walks_Utilization_SMT'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'BpTB'
Found metric 'Branch_Misprediction_Cost'
Found metric 'Branch_Misprediction_Cost_SMT'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DRAM_Parallel_Reads'
Found metric 'DRAM_Read_Latency'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'FLOPc_SMT'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'GFLOPs'
Found metric 'IFetch_Line_Utilization'
Found metric 'ILP'
UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC not found
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpB'
Found metric 'IpCall'
Found metric 'IpL'
Found metric 'IpMispredict'
Found metric 'IpS'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'Page_Walks_Utilization_SMT'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Socket_CLKS'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'power_channel_ppd %'
Found metric 'power_critical_throttle_cycles %'
Found metric 'power_self_refresh %'
Found metric 'freq_max_limit_thermal_cycles %'
Found metric 'freq_max_os_cycles %'
Found metric 'freq_max_power_cycles %'
Found metric 'freq_trans_cycles %'
Found metric 'power_state_occupancy.cores_c0 %'
Found metric 'power_state_occupancy.cores_c3 %'
Found metric 'power_state_occupancy.cores_c6 %'
Found metric 'prochot_external_cycles %'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'BpTB'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'IFetch_Line_Utilization'
Found metric 'ILP'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpB'
Found metric 'IpCall'
Found metric 'IpL'
Found metric 'IpMispredict'
Found metric 'IpS'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'Page_Walks_Utilization_SMT'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'BpTB'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'IFetch_Line_Utilization'
Found metric 'ILP'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpB'
Found metric 'IpCall'
Found metric 'IpL'
Found metric 'IpMispredict'
Found metric 'IpS'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'Page_Walks_Utilization_SMT'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'BpTB'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'IFetch_Line_Utilization'
Found metric 'ILP'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpB'
Found metric 'IpCall'
Found metric 'IpL'
Found metric 'IpMispredict'
Found metric 'IpS'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'Page_Walks_Utilization_SMT'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'BpTB'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DRAM_Parallel_Reads'
Found metric 'DRAM_Read_Latency'
Found metric 'DSB_Coverage'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'IFetch_Line_Utilization'
Found metric 'ILP'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpB'
Found metric 'IpCall'
Found metric 'IpL'
Found metric 'IpMispredict'
Found metric 'IpS'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'Page_Walks_Utilization_SMT'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Socket_CLKS'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'power_channel_ppd %'
Found metric 'power_critical_throttle_cycles %'
Found metric 'power_self_refresh %'
Found metric 'freq_max_limit_thermal_cycles %'
Found metric 'freq_max_os_cycles %'
Found metric 'freq_max_power_cycles %'
Found metric 'freq_trans_cycles %'
Found metric 'power_state_occupancy.cores_c0 %'
Found metric 'power_state_occupancy.cores_c3 %'
Found metric 'power_state_occupancy.cores_c6 %'
Found metric 'prochot_external_cycles %'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'BpTB'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'FLOPc_SMT'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'GFLOPs'
Found metric 'IFetch_Line_Utilization'
Found metric 'ILP'
UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC not found
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpB'
Found metric 'IpCall'
Found metric 'IpL'
Found metric 'IpMispredict'
Found metric 'IpS'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'Page_Walks_Utilization_SMT'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'BpTB'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'FLOPc_SMT'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'GFLOPs'
Found metric 'IFetch_Line_Utilization'
Found metric 'ILP'
UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC not found
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpB'
Found metric 'IpCall'
Found metric 'IpL'
Found metric 'IpMispredict'
Found metric 'IpS'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'Page_Walks_Utilization_SMT'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Socket_CLKS'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'rxl0p_power_cycles %'
Found metric 'txl0p_power_cycles %'
Found metric 'power_channel_ppd %'
Found metric 'power_critical_throttle_cycles %'
Found metric 'power_self_refresh %'
Found metric 'freq_band0_cycles %'
Found metric 'freq_band0_cycles %'
Found metric 'freq_band1_cycles %'
Found metric 'freq_band1_cycles %'
Found metric 'freq_band2_cycles %'
Found metric 'freq_band2_cycles %'
Found metric 'freq_band3_cycles %'
Found metric 'freq_band3_cycles %'
Found metric 'freq_ge_1200mhz_cycles %'
Found metric 'freq_ge_1200mhz_cycles %'
Found metric 'freq_ge_2000mhz_cycles %'
Found metric 'freq_ge_2000mhz_cycles %'
Found metric 'freq_ge_3000mhz_cycles %'
Found metric 'freq_ge_3000mhz_cycles %'
Found metric 'freq_ge_4000mhz_cycles %'
Found metric 'freq_ge_4000mhz_cycles %'
Found metric 'freq_max_current_cycles %'
Found metric 'freq_max_limit_thermal_cycles %'
Found metric 'freq_max_os_cycles %'
Found metric 'freq_max_power_cycles %'
Found metric 'freq_trans_cycles %'
Found metric 'power_state_occupancy.cores_c0 %'
Found metric 'power_state_occupancy.cores_c3 %'
Found metric 'power_state_occupancy.cores_c6 %'
Found metric 'prochot_external_cycles %'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'FLOPc_SMT'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'GFLOPs'
Found metric 'IFetch_Line_Utilization'
Found metric 'ILP'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'Kernel_Utilization'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Socket_CLKS'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'tor_occupancy.miss_all %'
Found metric 'rxl0p_power_cycles %'
Found metric 'txl0p_power_cycles %'
Found metric 'power_channel_ppd %'
Found metric 'power_critical_throttle_cycles %'
Found metric 'power_self_refresh %'
Found metric 'freq_band0_cycles %'
Found metric 'freq_band0_cycles %'
Found metric 'freq_band1_cycles %'
Found metric 'freq_band1_cycles %'
Found metric 'freq_band2_cycles %'
Found metric 'freq_band2_cycles %'
Found metric 'freq_band3_cycles %'
Found metric 'freq_band3_cycles %'
Found metric 'freq_ge_1200mhz_cycles %'
Found metric 'freq_ge_1200mhz_cycles %'
Found metric 'freq_ge_2000mhz_cycles %'
Found metric 'freq_ge_2000mhz_cycles %'
Found metric 'freq_ge_3000mhz_cycles %'
Found metric 'freq_ge_3000mhz_cycles %'
Found metric 'freq_ge_4000mhz_cycles %'
Found metric 'freq_ge_4000mhz_cycles %'
Found metric 'freq_max_current_cycles %'
Found metric 'freq_max_limit_thermal_cycles %'
Found metric 'freq_max_os_cycles %'
Found metric 'freq_max_power_cycles %'
Found metric 'freq_trans_cycles %'
Found metric 'power_state_occupancy.cores_c0 %'
Found metric 'power_state_occupancy.cores_c3 %'
Found metric 'power_state_occupancy.cores_c6 %'
Found metric 'prochot_external_cycles %'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'BpTkBranch'
Found metric 'Branch_Misprediction_Cost'
Found metric 'Branch_Misprediction_Cost_SMT'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'FLOPc_SMT'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'GFLOPs'
Found metric 'ILP'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpBranch'
Found metric 'IpCall'
Found metric 'IpFLOP'
Found metric 'IpFarBranch'
Found metric 'IpLoad'
Found metric 'IpMispredict'
Found metric 'IpStore'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Access_BW'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MEM_Parallel_Reads'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'Page_Walks_Utilization_SMT'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'BpTkBranch'
Found metric 'Branch_Misprediction_Cost'
Found metric 'Branch_Misprediction_Cost_SMT'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'FLOPc_SMT'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'GFLOPs'
Found metric 'ILP'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpBranch'
Found metric 'IpCall'
Found metric 'IpFLOP'
Found metric 'IpFarBranch'
Found metric 'IpLoad'
Found metric 'IpMispredict'
Found metric 'IpStore'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Access_BW'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MEM_Parallel_Reads'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'Page_Walks_Utilization_SMT'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'FLOPc_SMT'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'GFLOPs'
Found metric 'IFetch_Line_Utilization'
Found metric 'ILP'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'Kernel_Utilization'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Backend_Bound'
Found metric 'Backend_Bound_SMT'
Found metric 'Bad_Speculation'
Found metric 'Bad_Speculation_SMT'
Found metric 'BpTkBranch'
Found metric 'Branch_Misprediction_Cost'
Found metric 'Branch_Misprediction_Cost_SMT'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'FLOPc_SMT'
Found metric 'Frontend_Bound'
Found metric 'Frontend_Bound_SMT'
Found metric 'GFLOPs'
Found metric 'ILP'
Found metric 'IO_Read_BW'
Found metric 'IO_Write_BW'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpBranch'
Found metric 'IpCall'
Found metric 'IpFLOP'
Found metric 'IpFarBranch'
Found metric 'IpLoad'
Found metric 'IpMispredict'
Found metric 'IpStore'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L2_Evictions_NonSilent_PKI'
Found metric 'L2_Evictions_Silent_PKI'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Access_BW'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MEM_Parallel_Reads'
Found metric 'MEM_Read_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'Page_Walks_Utilization_SMT'
Found metric 'Retiring'
Found metric 'Retiring_SMT'
Found metric 'SLOTS'
Found metric 'SLOTS_SMT'
Found metric 'SMT_2T_Utilization'
Found metric 'Socket_CLKS'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'power_channel_ppd %'
Found metric 'power_self_refresh %'
Found metric 'LLC_MISSES.PCIE_READ'
Found metric 'LLC_MISSES.PCIE_WRITE'
Found metric 'Average_Frequency'
Found metric 'BpTkBranch'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
CPU_CLK_UNHALTED.THREAD not found
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'CoreIPC_SMT'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'FLOPc_SMT'
Found metric 'GFLOPs'
Found metric 'ILP'
Found metric 'IO_Read_BW'
Found metric 'IO_Write_BW'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpBranch'
Found metric 'IpCall'
Found metric 'IpFLOP'
Found metric 'IpFarBranch'
Found metric 'IpLoad'
Found metric 'IpMispredict'
Found metric 'IpStore'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2HPKI_All'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L2_Evictions_NonSilent_PKI'
Found metric 'L2_Evictions_Silent_PKI'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Access_BW'
Found metric 'L3_Cache_Fill_BW'
Found metric 'LSD_Coverage'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MEM_PMM_Read_Latency'
Found metric 'MEM_Parallel_Reads'
Found metric 'MEM_Read_Latency'
Found metric 'MLP'
Found metric 'PMM_Read_BW'
Found metric 'PMM_Write_BW'
Found metric 'Page_Walks_Utilization'
CORE_CLKS not found
Found metric 'SMT_2T_Utilization'
Found metric 'Socket_CLKS'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'UNC_M_PMM_BANDWIDTH.TOTAL'
Found metric 'UNC_M_PMM_READ_LATENCY'
Found metric 'power_channel_ppd %'
Found metric 'power_self_refresh %'
Found metric 'LLC_MISSES.PCIE_READ'
Found metric 'LLC_MISSES.PCIE_WRITE'
Found metric 'Average_Frequency'
Found metric 'BpTkBranch'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'GFLOPs'
Found metric 'ILP'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpBranch'
Found metric 'IpCall'
Found metric 'IpFLOP'
Found metric 'IpFarBranch'
Found metric 'IpLoad'
Found metric 'IpMispredict'
Found metric 'IpStore'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Access_BW'
Found metric 'L3_Cache_Fill_BW'
Found metric 'LSD_Coverage'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Average_Frequency'
Found metric 'BpTkBranch'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'GFLOPs'
Found metric 'ILP'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpBranch'
Found metric 'IpCall'
Found metric 'IpFLOP'
Found metric 'IpFarBranch'
Found metric 'IpLoad'
Found metric 'IpMispredict'
Found metric 'IpStore'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Access_BW'
Found metric 'L3_Cache_Fill_BW'
Found metric 'LSD_Coverage'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Average_Frequency'
Found metric 'BpTkBranch'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
IPC not found
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'GFLOPs'
Found metric 'ILP'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpBranch'
Found metric 'IpCall'
Found metric 'IpFLOP'
Found metric 'IpFarBranch'
Found metric 'IpLoad'
Found metric 'IpMispredict'
Found metric 'IpStore'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2MPKI'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Access_BW'
Found metric 'LSD_Coverage'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
CORE_CLKS not found
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'Average_Frequency'
Found metric 'BpTkBranch'
Found metric 'C2_Pkg_Residency'
Found metric 'C3_Core_Residency'
Found metric 'C3_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'C7_Core_Residency'
Found metric 'C7_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'GFLOPs'
Found metric 'ILP'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpBranch'
Found metric 'IpCall'
Found metric 'IpFLOP'
Found metric 'IpFarBranch'
Found metric 'IpLoad'
Found metric 'IpMispredict'
Found metric 'IpStore'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Access_BW'
Found metric 'L3_Cache_Fill_BW'
Found metric 'LSD_Coverage'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MLP'
Found metric 'Page_Walks_Utilization'
Found metric 'SMT_2T_Utilization'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Average_Frequency'
Found metric 'BpTkBranch'
Found metric 'C1_Core_Residency'
Found metric 'C2_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'GFLOPs'
Found metric 'ILP'
Found metric 'IO_Read_BW'
Found metric 'IO_Write_BW'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpBranch'
Found metric 'IpCall'
Found metric 'IpFLOP'
Found metric 'IpFarBranch'
Found metric 'IpLoad'
Found metric 'IpMispredict'
Found metric 'IpStore'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L2_Evictions_NonSilent_PKI'
Found metric 'L2_Evictions_Silent_PKI'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Access_BW'
Found metric 'L3_Cache_Fill_BW'
Found metric 'LSD_Coverage'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MEM_PMM_Read_Latency'
Found metric 'MEM_Parallel_Reads'
Found metric 'MEM_Read_Latency'
Found metric 'MLP'
Found metric 'PMM_Read_BW'
Found metric 'PMM_Write_BW'
Found metric 'Page_Walks_Utilization'
Found metric 'SMT_2T_Utilization'
Found metric 'Socket_CLKS'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'Average_Frequency'
Found metric 'BpTkBranch'
Found metric 'C1_Core_Residency'
Found metric 'C2_Pkg_Residency'
Found metric 'C6_Core_Residency'
Found metric 'C6_Pkg_Residency'
Found metric 'CLKS'
Found metric 'CORE_CLKS'
Found metric 'CPI'
Found metric 'CPU_Utilization'
Found metric 'CoreIPC'
Found metric 'DRAM_BW_Use'
Found metric 'DSB_Coverage'
Found metric 'FLOPc'
Found metric 'GFLOPs'
Found metric 'ILP'
Found metric 'IO_Read_BW'
Found metric 'IO_Write_BW'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpBranch'
Found metric 'IpCall'
Found metric 'IpFLOP'
Found metric 'IpFarBranch'
Found metric 'IpLoad'
Found metric 'IpMispredict'
Found metric 'IpStore'
Found metric 'IpTB'
Found metric 'Kernel_Utilization'
Found metric 'L1D_Cache_Fill_BW'
Found metric 'L1MPKI'
Found metric 'L2MPKI'
Found metric 'L2MPKI_All'
Found metric 'L2_Cache_Fill_BW'
Found metric 'L2_Evictions_NonSilent_PKI'
Found metric 'L2_Evictions_Silent_PKI'
Found metric 'L3MPKI'
Found metric 'L3_Cache_Access_BW'
Found metric 'L3_Cache_Fill_BW'
Found metric 'LSD_Coverage'
Found metric 'Load_Miss_Real_Latency'
Found metric 'MEM_PMM_Read_Latency'
Found metric 'MEM_Parallel_Reads'
Found metric 'MEM_Read_Latency'
Found metric 'MLP'
Found metric 'PMM_Read_BW'
Found metric 'PMM_Write_BW'
Found metric 'Page_Walks_Utilization'
Found metric 'SMT_2T_Utilization'
Found metric 'Socket_CLKS'
Found metric 'Turbo_Utilization'
Found metric 'UPI'
Found metric 'LLC_MISSES.PCIE_READ'
Found metric 'LLC_MISSES.PCIE_WRITE'
Found metric 'Average_Frequency'
Found metric 'CLKS'
Found metric 'CPI'
IPC not found
Found metric 'CPU_Utilization'
Found metric 'IPC'
Found metric 'Instructions'
Found metric 'IpBranch'
Found metric 'IpMispredict'
Found metric 'Kernel_Utilization'
Found metric 'L3_Cache_Fill_BW'
Found metric 'Turbo_Utilization'
Found metric 'all_l2_cache_accesses'
Found metric 'all_l2_cache_hits'
Found metric 'all_l2_cache_misses'
Found metric 'all_remote_links_outbound'
Found metric 'branch_misprediction_ratio'
Found metric 'ic_fetch_miss_ratio'
Found metric 'l1_itlb_misses'
Found metric 'l2_cache_accesses_from_l2_hwpf'
Found metric 'l2_cache_misses_from_l2_hwpf'
Found metric 'l3_read_miss_latency'
Found metric 'nps1_die_to_dram'
Found metric 'all_l2_cache_accesses'
Found metric 'all_l2_cache_hits'
Found metric 'all_l2_cache_misses'
Found metric 'all_remote_links_outbound'
Found metric 'branch_misprediction_ratio'
Found metric 'ic_fetch_miss_ratio'
Found metric 'l1_itlb_misses'
Found metric 'l2_cache_accesses_from_l2_hwpf'
Found metric 'l2_cache_misses_from_l2_hwpf'
Found metric 'l3_read_miss_latency'
Found metric 'nps1_die_to_dram'
Found metric 'all_l2_cache_accesses'
Parse event failed metric 'all_l2_cache_accesses' id 'l2_pf_miss_l2_l3' expr 'l2_request_g1.all_no_prefetch + l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
Error string 'parser error' help '(null)'
Parse event failed metric 'all_l2_cache_accesses' id 'l2_pf_hit_l2' expr 'l2_request_g1.all_no_prefetch + l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
Error string 'parser error' help '(null)'
Parse event failed metric 'all_l2_cache_accesses' id 'l2_pf_miss_l2_hit_l3' expr 'l2_request_g1.all_no_prefetch + l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
Error string 'parser error' help '(null)'
Parse event failed metric 'all_l2_cache_accesses' id 'l2_request_g1.all_no_prefetch' expr 'l2_request_g1.all_no_prefetch + l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
Error string 'parser error' help '(null)'
Found metric 'all_l2_cache_hits'
Parse event failed metric 'all_l2_cache_hits' id 'l2_pf_hit_l2' expr 'l2_cache_req_stat.ic_dc_hit_in_l2 + l2_pf_hit_l2'
Error string 'parser error' help '(null)'
Parse event failed metric 'all_l2_cache_hits' id 'l2_cache_req_stat.ic_dc_hit_in_l2' expr 'l2_cache_req_stat.ic_dc_hit_in_l2 + l2_pf_hit_l2'
Error string 'parser error' help '(null)'
Found metric 'all_l2_cache_misses'
Parse event failed metric 'all_l2_cache_misses' id 'l2_pf_miss_l2_l3' expr 'l2_cache_req_stat.ic_dc_miss_in_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
Error string 'parser error' help '(null)'
Parse event failed metric 'all_l2_cache_misses' id 'l2_pf_miss_l2_hit_l3' expr 'l2_cache_req_stat.ic_dc_miss_in_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
Error string 'parser error' help '(null)'
Parse event failed metric 'all_l2_cache_misses' id 'l2_cache_req_stat.ic_dc_miss_in_l2' expr 'l2_cache_req_stat.ic_dc_miss_in_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
Error string 'parser error' help '(null)'
Found metric 'all_remote_links_outbound'
Parse event failed metric 'all_remote_links_outbound' id 'remote_outbound_data_controller_3' expr 'remote_outbound_data_controller_0 + remote_outbound_data_controller_1 + remote_outbound_data_controller_2 + remote_outbound_data_controller_3'
Error string 'parser error' help '(null)'
Parse event failed metric 'all_remote_links_outbound' id 'remote_outbound_data_controller_0' expr 'remote_outbound_data_controller_0 + remote_outbound_data_controller_1 + remote_outbound_data_controller_2 + remote_outbound_data_controller_3'
Error string 'parser error' help '(null)'
Parse event failed metric 'all_remote_links_outbound' id 'remote_outbound_data_controller_2' expr 'remote_outbound_data_controller_0 + remote_outbound_data_controller_1 + remote_outbound_data_controller_2 + remote_outbound_data_controller_3'
Error string 'parser error' help '(null)'
Parse event failed metric 'all_remote_links_outbound' id 'remote_outbound_data_controller_1' expr 'remote_outbound_data_controller_0 + remote_outbound_data_controller_1 + remote_outbound_data_controller_2 + remote_outbound_data_controller_3'
Error string 'parser error' help '(null)'
Found metric 'branch_misprediction_ratio'
Parse event failed metric 'branch_misprediction_ratio' id 'ex_ret_brn' expr 'd_ratio(ex_ret_brn_misp, ex_ret_brn)'
Error string 'parser error' help '(null)'
Parse event failed metric 'branch_misprediction_ratio' id 'ex_ret_brn_misp' expr 'd_ratio(ex_ret_brn_misp, ex_ret_brn)'
Error string 'parser error' help '(null)'
Found metric 'ic_fetch_miss_ratio'
Parse event failed metric 'ic_fetch_miss_ratio' id 'ic_tag_hit_miss.instruction_cache_miss' expr 'd_ratio(ic_tag_hit_miss.instruction_cache_miss, ic_tag_hit_miss.all_instruction_cache_accesses)'
Error string 'parser error' help '(null)'
Parse event failed metric 'ic_fetch_miss_ratio' id 'ic_tag_hit_miss.all_instruction_cache_accesses' expr 'd_ratio(ic_tag_hit_miss.instruction_cache_miss, ic_tag_hit_miss.all_instruction_cache_accesses)'
Error string 'parser error' help '(null)'
Found metric 'l1_itlb_misses'
Parse event failed metric 'l1_itlb_misses' id 'bp_l1_tlb_miss_l2_tlb_miss' expr 'bp_l1_tlb_miss_l2_tlb_hit + bp_l1_tlb_miss_l2_tlb_miss'
Error string 'parser error' help '(null)'
Parse event failed metric 'l1_itlb_misses' id 'bp_l1_tlb_miss_l2_tlb_hit' expr 'bp_l1_tlb_miss_l2_tlb_hit + bp_l1_tlb_miss_l2_tlb_miss'
Error string 'parser error' help '(null)'
Found metric 'l2_cache_accesses_from_l2_hwpf'
Parse event failed metric 'l2_cache_accesses_from_l2_hwpf' id 'l2_pf_miss_l2_l3' expr 'l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
Error string 'parser error' help '(null)'
Parse event failed metric 'l2_cache_accesses_from_l2_hwpf' id 'l2_pf_hit_l2' expr 'l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
Error string 'parser error' help '(null)'
Parse event failed metric 'l2_cache_accesses_from_l2_hwpf' id 'l2_pf_miss_l2_hit_l3' expr 'l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
Error string 'parser error' help '(null)'
Found metric 'l2_cache_misses_from_l2_hwpf'
Parse event failed metric 'l2_cache_misses_from_l2_hwpf' id 'l2_pf_miss_l2_l3' expr 'l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
Error string 'parser error' help '(null)'
Parse event failed metric 'l2_cache_misses_from_l2_hwpf' id 'l2_pf_miss_l2_hit_l3' expr 'l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
Error string 'parser error' help '(null)'
Found metric 'l3_read_miss_latency'
Parse event failed metric 'l3_read_miss_latency' id 'xi_ccx_sdp_req1' expr '(xi_sys_fill_latency * 16) / xi_ccx_sdp_req1'
Error string 'parser error' help '(null)'
Parse event failed metric 'l3_read_miss_latency' id 'xi_sys_fill_latency' expr '(xi_sys_fill_latency * 16) / xi_ccx_sdp_req1'
Error string 'parser error' help '(null)'
Found metric 'macro_ops_dispatched'
Parse event failed metric 'macro_ops_dispatched' id 'de_dis_cops_from_decoder.disp_op_type.any_fp_dispatch' expr 'de_dis_cops_from_decoder.disp_op_type.any_integer_dispatch + de_dis_cops_from_decoder.disp_op_type.any_fp_dispatch'
Error string 'parser error' help '(null)'
Parse event failed metric 'macro_ops_dispatched' id 'de_dis_cops_from_decoder.disp_op_type.any_integer_dispatch' expr 'de_dis_cops_from_decoder.disp_op_type.any_integer_dispatch + de_dis_cops_from_decoder.disp_op_type.any_fp_dispatch'
Error string 'parser error' help '(null)'
Found metric 'nps1_die_to_dram'
Parse event failed metric 'nps1_die_to_dram' id 'dram_channel_data_controller_4' expr 'dram_channel_data_controller_0 + dram_channel_data_controller_1 + dram_channel_data_controller_2 + dram_channel_data_controller_3 + dram_channel_data_controller_4 + dram_channel_data_controller_5 + dram_channel_data_controller_6 + dram_channel_data_controller_7'
Error string 'parser error' help '(null)'
Parse event failed metric 'nps1_die_to_dram' id 'dram_channel_data_controller_1' expr 'dram_channel_data_controller_0 + dram_channel_data_controller_1 + dram_channel_data_controller_2 + dram_channel_data_controller_3 + dram_channel_data_controller_4 + dram_channel_data_controller_5 + dram_channel_data_controller_6 + dram_channel_data_controller_7'
Error string 'parser error' help '(null)'
Parse event failed metric 'nps1_die_to_dram' id 'dram_channel_data_controller_6' expr 'dram_channel_data_controller_0 + dram_channel_data_controller_1 + dram_channel_data_controller_2 + dram_channel_data_controller_3 + dram_channel_data_controller_4 + dram_channel_data_controller_5 + dram_channel_data_controller_6 + dram_channel_data_controller_7'
Error string 'parser error' help '(null)'
Parse event failed metric 'nps1_die_to_dram' id 'dram_channel_data_controller_3' expr 'dram_channel_data_controller_0 + dram_channel_data_controller_1 + dram_channel_data_controller_2 + dram_channel_data_controller_3 + dram_channel_data_controller_4 + dram_channel_data_controller_5 + dram_channel_data_controller_6 + dram_channel_data_controller_7'
Error string 'parser error' help '(null)'
Parse event failed metric 'nps1_die_to_dram' id 'dram_channel_data_controller_0' expr 'dram_channel_data_controller_0 + dram_channel_data_controller_1 + dram_channel_data_controller_2 + dram_channel_data_controller_3 + dram_channel_data_controller_4 + dram_channel_data_controller_5 + dram_channel_data_controller_6 + dram_channel_data_controller_7'
Error string 'parser error' help '(null)'
Parse event failed metric 'nps1_die_to_dram' id 'dram_channel_data_controller_5' expr 'dram_channel_data_controller_0 + dram_channel_data_controller_1 + dram_channel_data_controller_2 + dram_channel_data_controller_3 + dram_channel_data_controller_4 + dram_channel_data_controller_5 + dram_channel_data_controller_6 + dram_channel_data_controller_7'
Error string 'parser error' help '(null)'
Parse event failed metric 'nps1_die_to_dram' id 'dram_channel_data_controller_2' expr 'dram_channel_data_controller_0 + dram_channel_data_controller_1 + dram_channel_data_controller_2 + dram_channel_data_controller_3 + dram_channel_data_controller_4 + dram_channel_data_controller_5 + dram_channel_data_controller_6 + dram_channel_data_controller_7'
Error string 'parser error' help '(null)'
Parse event failed metric 'nps1_die_to_dram' id 'dram_channel_data_controller_7' expr 'dram_channel_data_controller_0 + dram_channel_data_controller_1 + dram_channel_data_controller_2 + dram_channel_data_controller_3 + dram_channel_data_controller_4 + dram_channel_data_controller_5 + dram_channel_data_controller_6 + dram_channel_data_controller_7'
Error string 'parser error' help '(null)'
Found metric 'op_cache_fetch_miss_ratio'
Parse event failed metric 'op_cache_fetch_miss_ratio' id 'op_cache_hit_miss.op_cache_miss' expr 'd_ratio(op_cache_hit_miss.op_cache_miss, op_cache_hit_miss.all_op_cache_accesses)'
Error string 'parser error' help '(null)'
Parse event failed metric 'op_cache_fetch_miss_ratio' id 'op_cache_hit_miss.all_op_cache_accesses' expr 'd_ratio(op_cache_hit_miss.op_cache_miss, op_cache_hit_miss.all_op_cache_accesses)'
Error string 'parser error' help '(null)'
test child finished with -1
---- end ----
PMU events subtest 3: FAILED!
10.4: Parsing of PMU event table metrics with fake PMUs             :
--- start ---
test child forked, pid 4159
parsing '(unc_p_power_state_occupancy.cores_c0 / unc_p_clockticks) * 100.'
Using CPUID AuthenticAMD-25-11-1
parsing 'imx8_ddr0@read\-cycles@ * 4 * 4'
parsing 'imx8_ddr0@axid\-read\,axi_mask\=0xffff\,axi_id\=0x0000@ * 4'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(imx8_ddr0@read\-cycles@ + imx8_ddr0@write\-cycles@)'
parsing '2* ( RS_EVENTS.EMPTY_CYCLES - ICACHE.IFDATA_STALL  - ( 14 * ITLB_MISSES.STLB_HIT + cpu@ITLB_MISSES.WALK_DURATION\,cmask\=1@ + 7* ITLB_MISSES.WALK_COMPLETED ) ) / RS_EVENTS.EMPTY_END'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else CPU_CLK_UNHALTED.THREAD'
CPU_CLK_UNHALTED.THREAD not found
parsing '1 / INST_RETIRED.ANY / cycles'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / ( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else cycles'
cycles not found
parsing 'IDQ.DSB_UOPS / ( IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS )'
parsing '( 1*( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2* FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4*( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8* FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE ) / 1000000000 / duration_time'
parsing 'min( 1 , IDQ.MITE_UOPS / ( UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY * 16 * ( ICACHE.HIT + ICACHE.MISSES ) / 4.0 ) )'
parsing 'UOPS_EXECUTED.THREAD / ( cpu@uops_executed.core\,cmask\=1@ / 2) if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC'
UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC not found
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_UOPS_RETIRED.L1_MISS + mem_load_uops_retired.hit_lfb )'
parsing 'L1D_PEND_MISS.PENDING / ( cpu@l1d_pend_miss.pending_cycles\,any\=1@ / 2) if #SMT_on else L1D_PEND_MISS.PENDING_CYCLES'
L1D_PEND_MISS.PENDING_CYCLES not found
parsing '( cpu@ITLB_MISSES.WALK_DURATION\,cmask\=1@ + cpu@DTLB_LOAD_MISSES.WALK_DURATION\,cmask\=1@ + cpu@DTLB_STORE_MISSES.WALK_DURATION\,cmask\=1@ + 7*(DTLB_STORE_MISSES.WALK_COMPLETED+DTLB_LOAD_MISSES.WALK_COMPLETED+ITLB_MISSES.WALK_COMPLETED)) / ( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else cycles'
cycles not found
parsing '4*( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else cycles'
cycles not found
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '(UNC_M_POWER_CHANNEL_PPD / UNC_M_DCLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_CRITICAL_THROTTLE_CYCLES / UNC_M_DCLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_SELF_REFRESH / UNC_M_DCLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_OS_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_POWER_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_TRANS_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C0 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C3 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C6 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_PROCHOT_EXTERNAL_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '( ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT )) * (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles))) + (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * cycles)) * (12 * ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT + BACLEARS.ANY ) / cycles) / (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * cycles)) ) * (4 * cycles) / BR_MISP_RETIRED.ALL_BRANCHES'
parsing '( ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT )) * (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))))) + (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) * (12 * ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT + BACLEARS.ANY ) / cycles) / (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) ) * (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) / BR_MISP_RETIRED.ALL_BRANCHES'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '64 * ( arb@event\=0x81\,umask\=0x1@ + arb@event\=0x84\,umask\=0x1@ ) / 1000000 / duration_time / 1000'
parsing 'IDQ.DSB_UOPS / (( IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS ) )'
parsing '(( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )) / cycles'
parsing '(( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '( (( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )) / 1000000000 ) / duration_time'
parsing 'min( 1 , IDQ.MITE_UOPS / ( (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY) * 16 * ( ICACHE.HIT + ICACHE.MISSES ) / 4.0 ) )'
parsing 'UOPS_EXECUTED.THREAD / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC)'
UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC not found
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * ( L2_RQSTS.REFERENCES - L2_RQSTS.MISS ) / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * L2_RQSTS.MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_UOPS_RETIRED.L1_MISS + mem_load_uops_retired.hit_lfb )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( cpu@ITLB_MISSES.WALK_DURATION\,cmask\=1@ + cpu@DTLB_LOAD_MISSES.WALK_DURATION\,cmask\=1@ + cpu@DTLB_STORE_MISSES.WALK_DURATION\,cmask\=1@ + 7 * ( DTLB_STORE_MISSES.WALK_COMPLETED + DTLB_LOAD_MISSES.WALK_COMPLETED + ITLB_MISSES.WALK_COMPLETED ) ) / cycles'
parsing '( cpu@ITLB_MISSES.WALK_DURATION\,cmask\=1@ + cpu@DTLB_LOAD_MISSES.WALK_DURATION\,cmask\=1@ + cpu@DTLB_STORE_MISSES.WALK_DURATION\,cmask\=1@ + 7 * ( DTLB_STORE_MISSES.WALK_COMPLETED + DTLB_LOAD_MISSES.WALK_COMPLETED + ITLB_MISSES.WALK_COMPLETED ) ) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '4 * cycles'
parsing '4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '( ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT )) * (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles))) + (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * cycles)) * (12 * ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT + BACLEARS.ANY ) / cycles) / (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * cycles)) ) * (4 * cycles) / BR_MISP_RETIRED.ALL_BRANCHES'
parsing '( ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT )) * (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))))) + (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) * (12 * ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT + BACLEARS.ANY ) / cycles) / (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) ) * (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) / BR_MISP_RETIRED.ALL_BRANCHES'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '64 * ( arb@event\=0x81\,umask\=0x1@ + arb@event\=0x84\,umask\=0x1@ ) / 1000000 / duration_time / 1000'
parsing 'IDQ.DSB_UOPS / (( IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS ) )'
parsing '(( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )) / cycles'
parsing '(( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '( (( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )) / 1000000000 ) / duration_time'
parsing 'min( 1 , IDQ.MITE_UOPS / ( (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY) * 16 * ( ICACHE.HIT + ICACHE.MISSES ) / 4.0 ) )'
parsing 'UOPS_EXECUTED.THREAD / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC)'
UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC not found
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * ( L2_RQSTS.REFERENCES - L2_RQSTS.MISS ) / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * L2_RQSTS.MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_UOPS_RETIRED.L1_MISS + mem_load_uops_retired.hit_lfb )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( cpu@ITLB_MISSES.WALK_DURATION\,cmask\=1@ + cpu@DTLB_LOAD_MISSES.WALK_DURATION\,cmask\=1@ + cpu@DTLB_STORE_MISSES.WALK_DURATION\,cmask\=1@ + 7 * ( DTLB_STORE_MISSES.WALK_COMPLETED + DTLB_LOAD_MISSES.WALK_COMPLETED + ITLB_MISSES.WALK_COMPLETED ) ) / cycles'
parsing '( cpu@ITLB_MISSES.WALK_DURATION\,cmask\=1@ + cpu@DTLB_LOAD_MISSES.WALK_DURATION\,cmask\=1@ + cpu@DTLB_STORE_MISSES.WALK_DURATION\,cmask\=1@ + 7 * ( DTLB_STORE_MISSES.WALK_COMPLETED + DTLB_LOAD_MISSES.WALK_COMPLETED + ITLB_MISSES.WALK_COMPLETED ) ) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '4 * cycles'
parsing '4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '( ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT )) * (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles))) + (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * cycles)) * (12 * ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT + BACLEARS.ANY ) / cycles) / (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * cycles)) ) * (4 * cycles) / BR_MISP_RETIRED.ALL_BRANCHES'
parsing '( ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT )) * (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))))) + (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) * (12 * ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT + BACLEARS.ANY ) / cycles) / (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) ) * (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) / BR_MISP_RETIRED.ALL_BRANCHES'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '( 64 * ( uncore_imc@cas_count_read@ + uncore_imc@cas_count_write@ ) / 1000000000 ) / duration_time'
parsing 'cbox@event\=0x36\,umask\=0x3\,filter_opc\=0x182@ / cbox@event\=0x36\,umask\=0x3\,filter_opc\=0x182\,thresh\=1@'
parsing '1000000000 * ( cbox@event\=0x36\,umask\=0x3\,filter_opc\=0x182@ / cbox@event\=0x35\,umask\=0x3\,filter_opc\=0x182@ ) / ( cbox_0@event\=0x0@ / duration_time )'
parsing 'IDQ.DSB_UOPS / (( IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS ) )'
parsing '(( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )) / cycles'
parsing '(( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '( (( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )) / 1000000000 ) / duration_time'
parsing 'min( 1 , IDQ.MITE_UOPS / ( (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY) * 16 * ( ICACHE.HIT + ICACHE.MISSES ) / 4.0 ) )'
parsing 'UOPS_EXECUTED.THREAD / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC)'
UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC not found
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * ( L2_RQSTS.REFERENCES - L2_RQSTS.MISS ) / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * L2_RQSTS.MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_UOPS_RETIRED.L1_MISS + mem_load_uops_retired.hit_lfb )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION + 7 * ( DTLB_STORE_MISSES.WALK_COMPLETED + DTLB_LOAD_MISSES.WALK_COMPLETED + ITLB_MISSES.WALK_COMPLETED ) ) / ( 2 * cycles )'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION + 7 * ( DTLB_STORE_MISSES.WALK_COMPLETED + DTLB_LOAD_MISSES.WALK_COMPLETED + ITLB_MISSES.WALK_COMPLETED ) ) / ( 2 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )) )'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '4 * cycles'
parsing '4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'cbox_0@event\=0x0@'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '(UNC_M_POWER_CHANNEL_PPD / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_CRITICAL_THROTTLE_CYCLES / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_SELF_REFRESH / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_OS_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_POWER_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_TRANS_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C0 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C3 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C6 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_PROCHOT_EXTERNAL_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '64 * ( arb@event\=0x81\,umask\=0x1@ + arb@event\=0x84\,umask\=0x1@ ) / 1000000 / duration_time / 1000'
parsing 'IDQ.DSB_UOPS / (( IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS ) )'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'min( 1 , IDQ.MITE_UOPS / ( (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY) * 16 * ( ICACHE.HIT + ICACHE.MISSES ) / 4.0 ) )'
parsing '( UOPS_EXECUTED.CORE / 2 / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else cpu@UOPS_EXECUTED.CORE\,cmask\=1@) ) if #SMT_on else UOPS_EXECUTED.CORE / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else cpu@UOPS_EXECUTED.CORE\,cmask\=1@)'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_UOPS_RETIRED.L1_MISS + mem_load_uops_retired.hit_lfb )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION ) / cycles'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION ) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '4 * cycles'
parsing '4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '64 * ( arb@event\=0x81\,umask\=0x1@ + arb@event\=0x84\,umask\=0x1@ ) / 1000000 / duration_time / 1000'
parsing 'IDQ.DSB_UOPS / (( IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS ) )'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'min( 1 , IDQ.MITE_UOPS / ( (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY) * 16 * ( ICACHE.HIT + ICACHE.MISSES ) / 4.0 ) )'
parsing '( UOPS_EXECUTED.CORE / 2 / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else cpu@UOPS_EXECUTED.CORE\,cmask\=1@) ) if #SMT_on else UOPS_EXECUTED.CORE / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else cpu@UOPS_EXECUTED.CORE\,cmask\=1@)'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_UOPS_RETIRED.L1_MISS + mem_load_uops_retired.hit_lfb )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION ) / cycles'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION ) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '4 * cycles'
parsing '4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '64 * ( arb@event\=0x81\,umask\=0x1@ + arb@event\=0x84\,umask\=0x1@ ) / 1000000 / duration_time / 1000'
parsing 'IDQ.DSB_UOPS / (( IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS ) )'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'min( 1 , IDQ.MITE_UOPS / ( (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY) * 16 * ( ICACHE.HIT + ICACHE.MISSES ) / 4.0 ) )'
parsing '( UOPS_EXECUTED.CORE / 2 / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else cpu@UOPS_EXECUTED.CORE\,cmask\=1@) ) if #SMT_on else UOPS_EXECUTED.CORE / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else cpu@UOPS_EXECUTED.CORE\,cmask\=1@)'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_UOPS_RETIRED.L1_MISS + mem_load_uops_retired.hit_lfb )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION ) / cycles'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION ) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '4 * cycles'
parsing '4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '( 64 * ( uncore_imc@cas_count_read@ + uncore_imc@cas_count_write@ ) / 1000000000 ) / duration_time'
parsing 'cbox@event\=0x36\,umask\=0x3\,filter_opc\=0x182@ / cbox@event\=0x36\,umask\=0x3\,filter_opc\=0x182\,thresh\=1@'
parsing '1000000000 * ( cbox@event\=0x36\,umask\=0x3\,filter_opc\=0x182@ / cbox@event\=0x35\,umask\=0x3\,filter_opc\=0x182@ ) / ( cbox_0@event\=0x0@ / duration_time )'
parsing 'IDQ.DSB_UOPS / (( IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS ) )'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'min( 1 , IDQ.MITE_UOPS / ( (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY) * 16 * ( ICACHE.HIT + ICACHE.MISSES ) / 4.0 ) )'
parsing '( UOPS_EXECUTED.CORE / 2 / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else cpu@UOPS_EXECUTED.CORE\,cmask\=1@) ) if #SMT_on else UOPS_EXECUTED.CORE / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else cpu@UOPS_EXECUTED.CORE\,cmask\=1@)'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_UOPS_RETIRED.L1_MISS + mem_load_uops_retired.hit_lfb )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION ) / cycles'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION ) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '4 * cycles'
parsing '4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'cbox_0@event\=0x0@'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '(UNC_M_POWER_CHANNEL_PPD / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_CRITICAL_THROTTLE_CYCLES / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_SELF_REFRESH / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_OS_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_POWER_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_TRANS_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C0 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C3 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C6 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_PROCHOT_EXTERNAL_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '64 * ( arb@event\=0x81\,umask\=0x1@ + arb@event\=0x84\,umask\=0x1@ ) / 1000000 / duration_time / 1000'
parsing 'IDQ.DSB_UOPS / (( IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS ) )'
parsing '(( 1 * ( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2 * FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4 * ( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8 * SIMD_FP_256.PACKED_SINGLE )) / cycles'
parsing '(( 1 * ( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2 * FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4 * ( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8 * SIMD_FP_256.PACKED_SINGLE )) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '( (( 1 * ( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2 * FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4 * ( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8 * SIMD_FP_256.PACKED_SINGLE )) / 1000000000 ) / duration_time'
parsing 'min( 1 , UOPS_ISSUED.ANY / ( (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY) * 32 * ( ICACHE.HIT + ICACHE.MISSES ) / 4 ) )'
parsing 'UOPS_EXECUTED.THREAD / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC)'
UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC not found
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.LLC_MISS / INST_RETIRED.ANY'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_UOPS_RETIRED.L1_MISS + mem_load_uops_retired.hit_lfb )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION ) / cycles'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION ) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '4 * cycles'
parsing '4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '( 64 * ( uncore_imc@cas_count_read@ + uncore_imc@cas_count_write@ ) / 1000000000 ) / duration_time'
parsing 'IDQ.DSB_UOPS / (( IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS ) )'
parsing '(( 1 * ( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2 * FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4 * ( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8 * SIMD_FP_256.PACKED_SINGLE )) / cycles'
parsing '(( 1 * ( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2 * FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4 * ( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8 * SIMD_FP_256.PACKED_SINGLE )) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '( (( 1 * ( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2 * FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4 * ( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8 * SIMD_FP_256.PACKED_SINGLE )) / 1000000000 ) / duration_time'
parsing 'min( 1 , UOPS_ISSUED.ANY / ( (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY) * 32 * ( ICACHE.HIT + ICACHE.MISSES ) / 4 ) )'
parsing 'UOPS_EXECUTED.THREAD / (( cpu@UOPS_EXECUTED.CORE\,cmask\=1@ / 2 ) if #SMT_on else UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC)'
UOPS_EXECUTED.CYCLES_GE_1_UOP_EXEC not found
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_UOPS_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_UOPS_RETIRED.LLC_MISS / INST_RETIRED.ANY'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_UOPS_RETIRED.L1_MISS + mem_load_uops_retired.hit_lfb )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION ) / cycles'
parsing '( ITLB_MISSES.WALK_DURATION + DTLB_LOAD_MISSES.WALK_DURATION + DTLB_STORE_MISSES.WALK_DURATION ) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '4 * cycles'
parsing '4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'cbox_0@event\=0x0@'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '(UNC_Q_RxL0P_POWER_CYCLES / UNC_Q_CLOCKTICKS) * 100.'
parsing '(UNC_Q_TxL0P_POWER_CYCLES / UNC_Q_CLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_CHANNEL_PPD / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_CRITICAL_THROTTLE_CYCLES / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_SELF_REFRESH / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND0_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND0_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND1_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND1_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND2_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND2_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND3_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND3_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_1200MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_1200MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_2000MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_2000MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_3000MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_3000MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_4000MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_4000MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_CURRENT_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_OS_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_POWER_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_TRANS_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C0 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C3 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C6 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_PROCHOT_EXTERNAL_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '( 64 * ( uncore_imc@cas_count_read@ + uncore_imc@cas_count_write@ ) / 1000000000 ) / duration_time'
parsing 'IDQ.DSB_UOPS / (( IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS ) )'
parsing '(( 1 * ( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2 * FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4 * ( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8 * SIMD_FP_256.PACKED_SINGLE )) / cycles'
parsing '(( 1 * ( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2 * FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4 * ( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8 * SIMD_FP_256.PACKED_SINGLE )) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '( (( 1 * ( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2 * FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4 * ( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8 * SIMD_FP_256.PACKED_SINGLE )) / 1000000000 ) / duration_time'
parsing 'min( 1 , UOPS_ISSUED.ANY / ( (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY) * 32 * ( ICACHE.HIT + ICACHE.MISSES ) / 4 ) )'
parsing 'UOPS_DISPATCHED.THREAD / (( cpu@UOPS_DISPATCHED.CORE\,cmask\=1@ / 2 ) if #SMT_on else cpu@UOPS_DISPATCHED.CORE\,cmask\=1@)'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '4 * cycles'
parsing '4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'cbox_0@event\=0x0@'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '(UNC_C_TOR_OCCUPANCY.MISS_ALL / UNC_C_CLOCKTICKS) * 100.'
parsing '(UNC_Q_RxL0P_POWER_CYCLES / UNC_Q_CLOCKTICKS) * 100.'
parsing '(UNC_Q_TxL0P_POWER_CYCLES / UNC_Q_CLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_CHANNEL_PPD / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_CRITICAL_THROTTLE_CYCLES / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_SELF_REFRESH / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND0_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND0_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND1_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND1_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND2_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND2_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND3_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_BAND3_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_1200MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_1200MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_2000MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_2000MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_3000MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_3000MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_4000MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_GE_4000MHZ_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_CURRENT_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_OS_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_MAX_POWER_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_FREQ_TRANS_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C0 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C3 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_POWER_STATE_OCCUPANCY.CORES_C6 / UNC_P_CLOCKTICKS) * 100.'
parsing '(UNC_P_PROCHOT_EXTERNAL_CYCLES / UNC_P_CLOCKTICKS) * 100.'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY / 2 ) ) / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY / 2 ) ) / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '( ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT )) * (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles))) + (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * cycles)) * (( INT_MISC.CLEAR_RESTEER_CYCLES + 9 * BACLEARS.ANY ) / cycles) / (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * cycles)) ) * (4 * cycles) / BR_MISP_RETIRED.ALL_BRANCHES'
parsing '( ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT )) * (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY / 2 ) ) / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) * (( INT_MISC.CLEAR_RESTEER_CYCLES + 9 * BACLEARS.ANY ) / cycles) / (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) ) * (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )) / BR_MISP_RETIRED.ALL_BRANCHES'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '64 * ( arb@event\=0x81\,umask\=0x1@ + arb@event\=0x84\,umask\=0x1@ ) / 1000000 / duration_time / 1000'
parsing 'IDQ.DSB_UOPS / (IDQ.DSB_UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE ) / cycles'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE ) / ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE ) / 1000000000 ) / duration_time'
parsing 'UOPS_EXECUTED.THREAD / ( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 )'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )'
parsing 'INST_RETIRED.ANY / ( BR_INST_RETIRED.FAR_BRANCH / 2 )'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * ( L2_RQSTS.REFERENCES - L2_RQSTS.MISS ) / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * L2_RQSTS.MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )'
parsing 'arb@event\=0x80\,umask\=0x2@ / arb@event\=0x80\,umask\=0x2\,cmask\=1@'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING + EPT.WALK_PENDING ) / ( 2 * cycles )'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING + EPT.WALK_PENDING ) / ( 2 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ) )'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '4 * cycles'
parsing '4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 )'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY / 2 ) ) / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY / 2 ) ) / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '( ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT )) * (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles))) + (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * cycles)) * (( INT_MISC.CLEAR_RESTEER_CYCLES + 9 * BACLEARS.ANY ) / cycles) / (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * cycles)) ) * (4 * cycles) / BR_MISP_RETIRED.ALL_BRANCHES'
parsing '( ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT )) * (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY / 2 ) ) / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) * (( INT_MISC.CLEAR_RESTEER_CYCLES + 9 * BACLEARS.ANY ) / cycles) / (4 * IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) ) * (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )) / BR_MISP_RETIRED.ALL_BRANCHES'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '64 * ( arb@event\=0x81\,umask\=0x1@ + arb@event\=0x84\,umask\=0x1@ ) / 1000000 / duration_time / 1000'
parsing 'IDQ.DSB_UOPS / (IDQ.DSB_UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE ) / cycles'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE ) / ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE ) / 1000000000 ) / duration_time'
parsing 'UOPS_EXECUTED.THREAD / ( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 )'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE )'
parsing 'INST_RETIRED.ANY / ( BR_INST_RETIRED.FAR_BRANCH / 2 )'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * ( L2_RQSTS.REFERENCES - L2_RQSTS.MISS ) / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * L2_RQSTS.MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )'
parsing 'arb@event\=0x80\,umask\=0x2@ / arb@event\=0x80\,umask\=0x2\,cmask\=1@'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING + EPT.WALK_PENDING ) / ( 2 * cycles )'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING + EPT.WALK_PENDING ) / ( 2 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ) )'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '4 * cycles'
parsing '4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 )'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * (( INT_MISC.RECOVERY_CYCLES_ANY / 2 )) ) / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '64 * ( arb@event\=0x81\,umask\=0x1@ + arb@event\=0x84\,umask\=0x1@ ) / 1000000 / duration_time / 1000'
parsing 'IDQ.DSB_UOPS / (( IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS ) )'
parsing '(( 1 * ( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2 * FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4 * ( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8 * SIMD_FP_256.PACKED_SINGLE )) / cycles'
parsing '(( 1 * ( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2 * FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4 * ( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8 * SIMD_FP_256.PACKED_SINGLE )) / (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '( (( 1 * ( FP_COMP_OPS_EXE.SSE_SCALAR_SINGLE + FP_COMP_OPS_EXE.SSE_SCALAR_DOUBLE ) + 2 * FP_COMP_OPS_EXE.SSE_PACKED_DOUBLE + 4 * ( FP_COMP_OPS_EXE.SSE_PACKED_SINGLE + SIMD_FP_256.PACKED_DOUBLE ) + 8 * SIMD_FP_256.PACKED_SINGLE )) / 1000000000 ) / duration_time'
parsing 'min( 1 , UOPS_ISSUED.ANY / ( (UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY) * 32 * ( ICACHE.HIT + ICACHE.MISSES ) / 4 ) )'
parsing 'UOPS_DISPATCHED.THREAD / (( cpu@UOPS_DISPATCHED.CORE\,cmask\=1@ / 2 ) if #SMT_on else cpu@UOPS_DISPATCHED.CORE\,cmask\=1@)'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))'
parsing '4 * cycles'
parsing '4 * (( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)) )'
parsing '1 - ( (IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) + (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY / 2 ) ) / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) + (UOPS_RETIRED.RETIRE_SLOTS / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) )'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles)'
parsing '( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY / 2 ) ) / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '( ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT )) * (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * INT_MISC.RECOVERY_CYCLES ) / (4 * cycles))) + (4 * ( IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE - ( FRONTEND_RETIRED.LATENCY_GE_1 - FRONTEND_RETIRED.LATENCY_GE_2 ) / (UOPS_RETIRED.RETIRE_SLOTS / UOPS_ISSUED.ANY) ) / (4 * cycles)) * (( INT_MISC.CLEAR_RESTEER_CYCLES + 9 * BACLEARS.ANY ) / cycles) / (4 * ( IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE - ( FRONTEND_RETIRED.LATENCY_GE_1 - FRONTEND_RETIRED.LATENCY_GE_2 ) / (UOPS_RETIRED.RETIRE_SLOTS / UOPS_ISSUED.ANY) ) / (4 * cycles)) ) * (4 * cycles) / BR_MISP_RETIRED.ALL_BRANCHES'
parsing '( ((BR_MISP_RETIRED.ALL_BRANCHES / ( BR_MISP_RETIRED.ALL_BRANCHES + MACHINE_CLEARS.COUNT )) * (( UOPS_ISSUED.ANY - UOPS_RETIRED.RETIRE_SLOTS + 4 * ( INT_MISC.RECOVERY_CYCLES_ANY / 2 ) ) / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )))) + (4 * ( IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE - ( FRONTEND_RETIRED.LATENCY_GE_1 - FRONTEND_RETIRED.LATENCY_GE_2 ) / (UOPS_RETIRED.RETIRE_SLOTS / UOPS_ISSUED.ANY) ) / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) * (( INT_MISC.CLEAR_RESTEER_CYCLES + 9 * BACLEARS.ANY ) / cycles) / (4 * ( IDQ_UOPS_NOT_DELIVERED.CYCLES_0_UOPS_DELIV.CORE - ( FRONTEND_RETIRED.LATENCY_GE_1 - FRONTEND_RETIRED.LATENCY_GE_2 ) / (UOPS_RETIRED.RETIRE_SLOTS / UOPS_ISSUED.ANY) ) / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))) ) * (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )) / BR_MISP_RETIRED.ALL_BRANCHES'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 / (INST_RETIRED.ANY / cycles)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY / ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '( ( ( uncore_imc@cas_count_read@ + uncore_imc@cas_count_write@ ) * 1048576 ) / 1000000000 ) / duration_time'
parsing 'IDQ.DSB_UOPS / (IDQ.DSB_UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / cycles'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * cycles)'
parsing 'IDQ_UOPS_NOT_DELIVERED.CORE / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time'
parsing 'UOPS_EXECUTED.THREAD / ( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 )'
parsing '( UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3 ) * 4 / 1000000000 / duration_time'
parsing '( UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3 ) * 4 / 1000000000 / duration_time'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )'
parsing 'INST_RETIRED.ANY / ( BR_INST_RETIRED.FAR_BRANCH / 2 )'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * ( L2_RQSTS.REFERENCES - L2_RQSTS.MISS ) / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * L2_RQSTS.MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * L2_LINES_OUT.NON_SILENT / INST_RETIRED.ANY'
parsing '1000 * L2_LINES_OUT.SILENT / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )'
parsing 'cha@event\=0x36\,umask\=0x21\,config\=0x40433@ / cha@event\=0x36\,umask\=0x21\,config\=0x40433\,thresh\=1@'
parsing '1000000000 * ( cha@event\=0x36\,umask\=0x21\,config\=0x40433@ / cha@event\=0x35\,umask\=0x21\,config\=0x40433@ ) / ( cha_0@event\=0x0@ / duration_time )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING + EPT.WALK_PENDING ) / ( 2 * cycles )'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING + EPT.WALK_PENDING ) / ( 2 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ) )'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * cycles)'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / (4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) ))'
parsing '4 * cycles'
parsing '4 * ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '1 - CPU_CLK_THREAD_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_THREAD_UNHALTED.REF_XCLK_ANY / 2 )'
parsing 'cha_0@event\=0x0@'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing '(UNC_M_POWER_CHANNEL_PPD / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_SELF_REFRESH / UNC_M_CLOCKTICKS) * 100.'
parsing 'UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 +UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 +UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 +UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3'
parsing 'UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 +UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 +UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 +UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3'
parsing '(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing '( CPU_CLK_UNHALTED.THREAD_ANY / 2 ) if #SMT_on else CPU_CLK_UNHALTED.THREAD'
CPU_CLK_UNHALTED.THREAD not found
parsing '1 / (INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY / ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '( 64 * ( uncore_imc@cas_count_read@ + uncore_imc@cas_count_write@ ) / 1000000000 ) / duration_time'
parsing 'IDQ.DSB_UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / CPU_CLK_UNHALTED.THREAD'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / ( ( CPU_CLK_UNHALTED.THREAD / 2 ) * ( 1 + CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_XCLK ) )'
parsing '( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time'
parsing 'UOPS_EXECUTED.THREAD / (( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 ) if #SMT_on else UOPS_EXECUTED.CORE_CYCLES_GE_1)'
parsing '( UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3 ) * 4 / 1000000000 / duration_time'
parsing '( UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3 ) * 4 / 1000000000 / duration_time'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD_P:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * ( L2_RQSTS.REFERENCES - L2_RQSTS.MISS ) / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * L2_RQSTS.MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * L2_LINES_OUT.NON_SILENT / INST_RETIRED.ANY'
parsing '1000 * L2_LINES_OUT.SILENT / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'LSD.UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )'
parsing '( 1000000000 * ( imc@event\=0xe0\,umask\=0x1@ / imc@event\=0xe3@ ) / imc_0@event\=0x0@ )'
parsing 'cha@event\=0x36\,umask\=0x21\,config\=0x40433@ / cha@event\=0x36\,umask\=0x21\,config\=0x40433\,thresh\=1@'
parsing '1000000000 * ( cha@event\=0x36\,umask\=0x21\,config\=0x40433@ / cha@event\=0x35\,umask\=0x21\,config\=0x40433@ ) / ( cha_0@event\=0x0@ / duration_time )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ( 64 * imc@event\=0xe3@ / 1000000000 ) / duration_time )'
parsing '( ( 64 * imc@event\=0xe7@ / 1000000000 ) / duration_time )'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING + EPT.WALK_PENDING ) / ( 2 * CORE_CLKS )'
parsing '1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / ( CPU_CLK_UNHALTED.REF_XCLK_ANY / 2 ) if #SMT_on else 0'
parsing 'cha_0@event\=0x0@'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.RETIRE_SLOTS / INST_RETIRED.ANY'
parsing 'UNC_M_PMM_RPQ_INSERTS + UNC_M_PMM_WPQ_INSERTS'
parsing 'UNC_M_PMM_RPQ_OCCUPANCY.ALL / UNC_M_PMM_RPQ_INSERTS / UNC_M_CLOCKTICKS'
parsing '(UNC_M_POWER_CHANNEL_PPD / UNC_M_CLOCKTICKS) * 100.'
parsing '(UNC_M_POWER_SELF_REFRESH / UNC_M_CLOCKTICKS) * 100.'
parsing 'UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3'
parsing 'UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 + UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3'
parsing '(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing 'CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '1 / (INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '64 * ( arb@event\=0x81\,umask\=0x1@ + arb@event\=0x84\,umask\=0x1@ ) / 1000000 / duration_time / 1000'
parsing 'IDQ.DSB_UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time'
parsing 'UOPS_EXECUTED.THREAD / ( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 )'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * ( ( OFFCORE_REQUESTS.ALL_DATA_RD - OFFCORE_REQUESTS.DEMAND_DATA_RD ) + L2_RQSTS.ALL_DEMAND_MISS + L2_RQSTS.SWPF_MISS ) / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'LSD.UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING ) / ( 2 * CPU_CLK_UNHALTED.DISTRIBUTED )'
parsing '1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.SLOTS / INST_RETIRED.ANY'
parsing '(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing 'CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '1 / (INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '64 * ( arb@event\=0x81\,umask\=0x1@ + arb@event\=0x84\,umask\=0x1@ ) / 1000000 / duration_time / 1000'
parsing 'IDQ.DSB_UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time'
parsing 'UOPS_EXECUTED.THREAD / ( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 )'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * ( ( OFFCORE_REQUESTS.ALL_DATA_RD - OFFCORE_REQUESTS.DEMAND_DATA_RD ) + L2_RQSTS.ALL_DEMAND_MISS + L2_RQSTS.SWPF_MISS ) / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'LSD.UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING ) / ( 2 * CPU_CLK_UNHALTED.DISTRIBUTED )'
parsing '1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.SLOTS / INST_RETIRED.ANY'
parsing '(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing 'CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '1 / IPC'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.DISTRIBUTED'
parsing 'IDQ.DSB_UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time'
parsing 'UOPS_EXECUTED.THREAD / ( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 )'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD_P:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time'
parsing 'LSD.UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING ) / ( 2 * CORE_CLKS )'
parsing '1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing '(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c3\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c7\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c7\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing 'CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '1 / (INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '64 * ( arb@event\=0x81\,umask\=0x1@ + arb@event\=0x84\,umask\=0x1@ ) / 1000000 / duration_time / 1000'
parsing 'IDQ.DSB_UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time'
parsing 'UOPS_EXECUTED.THREAD / ( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 )'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * ( ( OFFCORE_REQUESTS.ALL_DATA_RD - OFFCORE_REQUESTS.DEMAND_DATA_RD ) + L2_RQSTS.ALL_DEMAND_MISS + L2_RQSTS.SWPF_MISS ) / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'LSD.UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING ) / ( 2 * CPU_CLK_UNHALTED.DISTRIBUTED )'
parsing '1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.SLOTS / INST_RETIRED.ANY'
parsing '(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_core@c1\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing 'CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '1 / (INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '( 64 * ( uncore_imc@cas_count_read@ + uncore_imc@cas_count_write@ ) / 1000000000 ) / duration_time'
parsing 'IDQ.DSB_UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time'
parsing 'UOPS_EXECUTED.THREAD / (( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 ) if #SMT_on else UOPS_EXECUTED.CORE_CYCLES_GE_1)'
parsing '( UNC_CHA_TOR_INSERTS.IO_HIT_ITOM + UNC_CHA_TOR_INSERTS.IO_MISS_ITOM + UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR + UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR ) * 64 / 1000000000 / duration_time'
parsing 'UNC_CHA_TOR_INSERTS.IO_PCIRDCUR * 64 / 1000000000 / duration_time'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD_P:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * ( ( OFFCORE_REQUESTS.ALL_DATA_RD - OFFCORE_REQUESTS.DEMAND_DATA_RD ) + L2_RQSTS.ALL_DEMAND_MISS + L2_RQSTS.SWPF_MISS ) / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * L2_LINES_OUT.NON_SILENT / INST_RETIRED.ANY'
parsing '1000 * L2_LINES_OUT.SILENT / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'LSD.UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )'
parsing '( 1000000000 * ( UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM / UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM ) / cha_0@event\=0x0@ )'
parsing 'UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD / cha@event\=0x36\,umask\=0xC817FE01\,thresh\=1@'
parsing '1000000000 * ( UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD / UNC_CHA_TOR_INSERTS.IA_MISS_DRD ) / ( cha_0@event\=0x0@ / duration_time )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ( 64 * imc@event\=0xe3@ / 1000000000 ) / duration_time )'
parsing '( ( 64 * imc@event\=0xe7@ / 1000000000 ) / duration_time )'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING ) / ( 2 * CPU_CLK_UNHALTED.DISTRIBUTED )'
parsing '1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED if #SMT_on else 0'
parsing 'cha_0@event\=0x0@'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.SLOTS / INST_RETIRED.ANY'
parsing '(CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 / duration_time'
parsing 'BR_INST_RETIRED.ALL_BRANCHES / BR_INST_RETIRED.NEAR_TAKEN'
parsing '(cstate_core@c1\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c2\-residency@ / msr@tsc@) * 100'
parsing '(cstate_core@c6\-residency@ / msr@tsc@) * 100'
parsing '(cstate_pkg@c6\-residency@ / msr@tsc@) * 100'
parsing 'CPU_CLK_UNHALTED.THREAD'
parsing 'CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '1 / (INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD)'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '( 64 * ( uncore_imc@cas_count_read@ + uncore_imc@cas_count_write@ ) / 1000000000 ) / duration_time'
parsing 'IDQ.DSB_UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing '( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / CPU_CLK_UNHALTED.DISTRIBUTED'
parsing '( ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE ) / 1000000000 ) / duration_time'
parsing 'UOPS_EXECUTED.THREAD / (( UOPS_EXECUTED.CORE_CYCLES_GE_1 / 2 ) if #SMT_on else UOPS_EXECUTED.CORE_CYCLES_GE_1)'
parsing '( UNC_CHA_TOR_INSERTS.IO_HIT_ITOM + UNC_CHA_TOR_INSERTS.IO_MISS_ITOM + UNC_CHA_TOR_INSERTS.IO_HIT_ITOMCACHENEAR + UNC_CHA_TOR_INSERTS.IO_MISS_ITOMCACHENEAR ) * 64 / 1000000000 / duration_time'
parsing 'UNC_CHA_TOR_INSERTS.IO_PCIRDCUR * 64 / 1000000000 / duration_time'
parsing 'INST_RETIRED.ANY / CPU_CLK_UNHALTED.THREAD'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_CALL'
parsing 'INST_RETIRED.ANY / ( 1 * ( FP_ARITH_INST_RETIRED.SCALAR_SINGLE + FP_ARITH_INST_RETIRED.SCALAR_DOUBLE ) + 2 * FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE + 4 * ( FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE ) + 8 * ( FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE + FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE ) + 16 * FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE )'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.FAR_BRANCH:u'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_LOADS'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / MEM_INST_RETIRED.ALL_STORES'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.NEAR_TAKEN'
parsing 'CPU_CLK_UNHALTED.THREAD_P:k / CPU_CLK_UNHALTED.THREAD'
parsing '64 * L1D.REPLACEMENT / 1000000000 / duration_time'
parsing '1000 * MEM_LOAD_RETIRED.L1_MISS / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L2_MISS / INST_RETIRED.ANY'
parsing '1000 * ( ( OFFCORE_REQUESTS.ALL_DATA_RD - OFFCORE_REQUESTS.DEMAND_DATA_RD ) + L2_RQSTS.ALL_DEMAND_MISS + L2_RQSTS.SWPF_MISS ) / INST_RETIRED.ANY'
parsing '64 * L2_LINES_IN.ALL / 1000000000 / duration_time'
parsing '1000 * L2_LINES_OUT.NON_SILENT / INST_RETIRED.ANY'
parsing '1000 * L2_LINES_OUT.SILENT / INST_RETIRED.ANY'
parsing '1000 * MEM_LOAD_RETIRED.L3_MISS / INST_RETIRED.ANY'
parsing '64 * OFFCORE_REQUESTS.ALL_REQUESTS / 1000000000 / duration_time'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 / duration_time'
parsing 'LSD.UOPS / (IDQ.DSB_UOPS + LSD.UOPS + IDQ.MITE_UOPS + IDQ.MS_UOPS)'
parsing 'L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )'
parsing '( 1000000000 * ( UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD_PMM / UNC_CHA_TOR_INSERTS.IA_MISS_DRD_PMM ) / cha_0@event\=0x0@ )'
parsing 'UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD / cha@event\=0x36\,umask\=0xC817FE01\,thresh\=1@'
parsing '1000000000 * ( UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD / UNC_CHA_TOR_INSERTS.IA_MISS_DRD ) / ( cha_0@event\=0x0@ / duration_time )'
parsing 'L1D_PEND_MISS.PENDING / L1D_PEND_MISS.PENDING_CYCLES'
parsing '( ( 64 * imc@event\=0xe3@ / 1000000000 ) / duration_time )'
parsing '( ( 64 * imc@event\=0xe7@ / 1000000000 ) / duration_time )'
parsing '( ITLB_MISSES.WALK_PENDING + DTLB_LOAD_MISSES.WALK_PENDING + DTLB_STORE_MISSES.WALK_PENDING ) / ( 2 * CPU_CLK_UNHALTED.DISTRIBUTED )'
parsing '1 - CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE / CPU_CLK_UNHALTED.REF_DISTRIBUTED if #SMT_on else 0'
parsing 'cha_0@event\=0x0@'
parsing 'CPU_CLK_UNHALTED.THREAD / CPU_CLK_UNHALTED.REF_TSC'
parsing 'UOPS_RETIRED.SLOTS / INST_RETIRED.ANY'
parsing 'UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 +UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 +UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 +UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3'
parsing 'UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 +UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 +UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 +UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3'
parsing '(cycles / CPU_CLK_UNHALTED.REF_TSC) * msr@tsc@ / 1000000000 '
parsing 'cycles'
parsing '1 / IPC'
parsing 'CPU_CLK_UNHALTED.REF_TSC / msr@tsc@'
parsing 'INST_RETIRED.ANY / cycles'
parsing 'INST_RETIRED.ANY'
parsing 'INST_RETIRED.ANY / BR_INST_RETIRED.ALL_BRANCHES'
parsing 'INST_RETIRED.ANY / BR_MISP_RETIRED.ALL_BRANCHES'
parsing 'cycles:k / cycles'
parsing '64 * LONGEST_LAT_CACHE.MISS / 1000000000 '
parsing 'cycles / CPU_CLK_UNHALTED.REF_TSC'
parsing 'l2_request_g1.all_no_prefetch + l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
parsing 'l2_cache_req_stat.ic_dc_hit_in_l2 + l2_pf_hit_l2'
parsing 'l2_cache_req_stat.ic_dc_miss_in_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
parsing 'remote_outbound_data_controller_0 + remote_outbound_data_controller_1 + remote_outbound_data_controller_2 + remote_outbound_data_controller_3'
parsing 'd_ratio(ex_ret_brn_misp, ex_ret_brn)'
parsing 'd_ratio(l2_cache_req_stat.ic_access_in_l2, bp_l1_tlb_fetch_hit + bp_l1_tlb_miss_l2_hit + bp_l1_tlb_miss_l2_miss)'
parsing 'bp_l1_tlb_miss_l2_hit + bp_l1_tlb_miss_l2_miss'
parsing 'l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
parsing 'l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
parsing '(xi_sys_fill_latency * 16) / xi_ccx_sdp_req1.all_l3_miss_req_typs'
parsing 'dram_channel_data_controller_0 + dram_channel_data_controller_1 + dram_channel_data_controller_2 + dram_channel_data_controller_3 + dram_channel_data_controller_4 + dram_channel_data_controller_5 + dram_channel_data_controller_6 + dram_channel_data_controller_7'
parsing 'l2_request_g1.all_no_prefetch + l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
parsing 'l2_cache_req_stat.ic_dc_hit_in_l2 + l2_pf_hit_l2'
parsing 'l2_cache_req_stat.ic_dc_miss_in_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
parsing 'remote_outbound_data_controller_0 + remote_outbound_data_controller_1 + remote_outbound_data_controller_2 + remote_outbound_data_controller_3'
parsing 'd_ratio(ex_ret_brn_misp, ex_ret_brn)'
parsing 'd_ratio(l2_cache_req_stat.ic_access_in_l2, bp_l1_tlb_fetch_hit + bp_l1_tlb_miss_l2_hit + bp_l1_tlb_miss_l2_tlb_miss)'
parsing 'bp_l1_tlb_miss_l2_hit + bp_l1_tlb_miss_l2_tlb_miss'
parsing 'l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
parsing 'l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
parsing '(xi_sys_fill_latency * 16) / xi_ccx_sdp_req1.all_l3_miss_req_typs'
parsing 'dram_channel_data_controller_0 + dram_channel_data_controller_1 + dram_channel_data_controller_2 + dram_channel_data_controller_3 + dram_channel_data_controller_4 + dram_channel_data_controller_5 + dram_channel_data_controller_6 + dram_channel_data_controller_7'
parsing 'l2_request_g1.all_no_prefetch + l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
parsing 'l2_cache_req_stat.ic_dc_hit_in_l2 + l2_pf_hit_l2'
parsing 'l2_cache_req_stat.ic_dc_miss_in_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
parsing 'remote_outbound_data_controller_0 + remote_outbound_data_controller_1 + remote_outbound_data_controller_2 + remote_outbound_data_controller_3'
parsing 'd_ratio(ex_ret_brn_misp, ex_ret_brn)'
parsing 'd_ratio(ic_tag_hit_miss.instruction_cache_miss, ic_tag_hit_miss.all_instruction_cache_accesses)'
parsing 'bp_l1_tlb_miss_l2_tlb_hit + bp_l1_tlb_miss_l2_tlb_miss'
parsing 'l2_pf_hit_l2 + l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
parsing 'l2_pf_miss_l2_hit_l3 + l2_pf_miss_l2_l3'
parsing '(xi_sys_fill_latency * 16) / xi_ccx_sdp_req1'
parsing 'de_dis_cops_from_decoder.disp_op_type.any_integer_dispatch + de_dis_cops_from_decoder.disp_op_type.any_fp_dispatch'
parsing 'dram_channel_data_controller_0 + dram_channel_data_controller_1 + dram_channel_data_controller_2 + dram_channel_data_controller_3 + dram_channel_data_controller_4 + dram_channel_data_controller_5 + dram_channel_data_controller_6 + dram_channel_data_controller_7'
parsing 'd_ratio(op_cache_hit_miss.op_cache_miss, op_cache_hit_miss.all_op_cache_accesses)'
test child finished with 0
---- end ----
PMU events subtest 4: Ok