Description of problem:
c0900d15d31c arm64: Ensure bits ASID[15:8] are masked out when the kernel uses 8-bit ASIDs
" Linux currently sets the TCR_EL1.AS bit unconditionally during CPU
    bring-up. On an 8-bit ASID CPU, this is RES0 and ignored, otherwise
    16-bit ASIDs are enabled. However, if running in a VM and the hypervisor
    reports 8-bit ASIDs (ID_AA64MMFR0_EL1.ASIDBits == 0) on a 16-bit ASIDs
    CPU, Linux uses bits 8 to 63 as a generation number for tracking old
    process ASIDs. The bottom 8 bits of this generation end up being written
    to TTBR1_EL1 and also used for the ASID-based TLBI operations as the
    upper 8 bits of the ASID. Following an ASID roll-over event we can have
    threads of the same application with the same 8-bit ASID but different
    generation numbers running on separate CPUs. Both TLB caching and the
    TLBI operations will end up using different actual 16-bit ASIDs for the
    same process."
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