Fix memory bandwidth counter width for Hygon CPUs The memory bandwidth calculation relies on reading the hardware counter and measuring the delta between samples. To ensure accurate measurement, the software reads the counter frequently enough to prevent it from rolling over twice between reads. The default base counter width is 24. Currently, Hygon CPUs do not support the CPUID 0xF.[ECX=1]:EAX to adjust the counter width. But the Hygon CPUs support wider bandwidth counter with the default width of 32 bits. Fix the issue by setting the default width to 32 bits (adjusting the offset to 8 bits) for Hygon CPUs.
The PR Link: https://gitee.com/anolis/cloud-kernel/pulls/6011