This ticket is created to track the enabling of Intel Sierra Forest (SRF) core PMU support for Anolis kernel devel-5.10, so that end user can access the uncore PerfMon counters via perf. Upstream commit(v6.6-rc1): a430021faad6 perf/x86/intel: Add Crestmont PMU But since SRF is an e-core only server platform and it shares same Crestmont core with Meteor Lake, its core PMU enabling is based on hybrid PMU driver which was firstly introduced since Alder Lake and later evolved with Raptor Lake. So there are lots of hybrid PMU related commits needed as dependencies. Besides the upstream commit, totally there're 53 dependent patches identified and backported. Here is the complete commit list for dependency: v6.6-rc1(3): //mem_attr = grt_mem_attrs; 535445621a66 x86/cpu: Update Hybrids 0cfd8fbadd68 x86/cpu: Fix Crestmont uarch 882cdb06b668 x86/cpu: Fix Gracemont uarch v6.3-rc1(7): // x86_pmu.pebs_latency_data = mtl_latency_data_small; b0bd3336d87f perf/x86/msr: Add Meteor Lake support eaef048c281b perf/x86/cstate: Add Meteor Lake support eb467aaac21e perf/x86/intel: Support Architectural PerfMon Extension leaf a018d2e3d4b1 x86/cpufeatures: Add Architectural PerfMon Extension bit c87a31093c70 perf/x86: Support Retire Latency 38aaf921e92d perf/x86: Add Meteor Lake support v6.0 (3): b6c00fb9949f perf: Add PMU_FORMAT_ATTR_SHOW 24919fdea6f8 perf/x86/intel: Fix unchecked MSR access error for Alder Lake N 5515d21c6817 x86/cpu: Add CPU model numbers for Meteor Lake v6.0-rc1(2): ccf170e9d8fd perf/x86/intel: Fix PEBS data source encoding for ADL 39a41278f041 perf/x86/intel: Fix PEBS memory access info encoding for ADL v5.19-rc1(5) // case INTEL_FAM6_ALDERLAKE_N: f758bc5a9123 perf/x86/uncore: Add new Alder Lake and Raptor Lake support e5ae168e8394 perf/x86/uncore: Clean up uncore_pci_ids[] cd971104ac7e perf/x86/cstate: Add new Alder Lake and Raptor Lake support d773a73366bd perf/x86/msr: Add new Alder Lake and Raptor Lake support c2a960f7c574 perf/x86: Add new Alder Lake and Raptor Lake support v5.18-rc5(1): // case INTEL_FAM6_ALDERLAKE_N: 3ccce9340326 x86/cpu: Add new Alderlake and Raptorlake CPU model numbers v5.18-rc2(4): // case INTEL_FAM6_RAPTORLAKE: ad4878d4d71d perf/x86/uncore: Add Raptor Lake uncore support 82cd83047a9a perf/x86/msr: Add Raptor Lake CPU support 2da202aa1c38 perf/x86/cstate: Add Raptor Lake support c61759e58157 perf/x86: Add Intel Raptor Lake support 5.17-rc2(1): 5a4487f9ef5e perf/x86/intel/uncore: Add IMC uncore support for ADL v5.16-rc4(1): 7d697f0d5737 x86/cpu: Drop spurious underscore from RAPTOR_LAKE #define v5.16-rc1(1): fbdb5e8f2926 x86/cpu: Add Raptor Lake to Intel family v5.14-rc5(1): acade6379930 perf/x86/intel: Apply mid ACK for small core 5.13-rc1(24): 6a5f4386798d perf/x86/rapl: Add support for Intel Alder Lake d0ca946bcf84 perf/x86/cstate: Add Alder Lake CPU support 19d3a81fd92d perf/x86/msr: Add Alder Lake CPU support 772ed05f3c5c perf/x86/intel/uncore: Add Alder Lake support 55bcf6ef314a perf: Extend PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE f83d2f91d259 perf/x86/intel: Add Alder Lake Hybrid support 3e9a8b219e4c perf/x86: Support filter_match callback 58ae30c29a37 perf/x86/intel: Add attr_update for Hybrid PMUs a9c81ccdf52d perf/x86: Add structures for the attributes of Hybrid PMUs d9977c43bff8 perf/x86: Register hybrid PMUs e11c1a7eb302 perf/x86: Factor out x86_pmu_show_pmu_cap b98567298bad perf/x86: Remove temporary pmu assignment in event_init 34d5b61f29ee perf/x86/intel: Factor out intel_pmu_check_extra_regs bc14fe1beeec perf/x86/intel: Factor out intel_pmu_check_event_constraints b8c4d1a87610 perf/x86/intel: Factor out intel_pmu_check_num_counters 183af7366b4e perf/x86: Hybrid PMU support for extra_regs 24ee38ffe61a perf/x86: Hybrid PMU support for event constraints 0d18f2dfead8 perf/x86: Hybrid PMU support for hardware cache event eaacf07d1116 perf/x86: Hybrid PMU support for unconstrained d4b294bf84db perf/x86: Hybrid PMU support for counters fc4b8fca2d8f perf/x86: Hybrid PMU support for intel_ctrl d0946a882e62 perf/x86/intel: Hybrid PMU support for perf capabilities 250b3c0d79d1 x86/cpu: Add helper function to get the type of the current hybrid CPU a161545ab53b x86/cpufeatures: Enumerate Intel Hybrid Technology feature bit v5.11-rc1(1): c2208046bba6 perf/x86/intel: Add Tremont Topdown support
The PR Link: https://gitee.com/anolis/cloud-kernel/pulls/2495
Update(2023/12/20): When testing on hybrid client platform Meteor Lake(MTL, Intel Core Ultra), I found the core PMU events are missing for performance core(P-core). It turns out that another two more bug fix commits are needed to fix this issue: 5.17-rc2(1): 7fa981cad216 perf/x86/intel: Add a quirk for the calculation of the number of counters on Alder Lake v5.14-rc1(1): ee72a94ea4a6 perf/x86/intel: Fix fixed counter check warning for some Alder Lake