Bug 8473 - [devel-5.10] Intel RDT non-contiguous CBM support
Summary: [devel-5.10] Intel RDT non-contiguous CBM support
Status: IN_PROGRESS
Alias: None
Product: ANCK 5.10 Dev
Classification: ANCK
Component: X86 (show other bugs) X86
Version: unspecified
Hardware: x86_64 Linux
: P3-Medium S3-normal
Target Milestone: ---
Assignee: Xuchun
QA Contact: shuming
URL:
Whiteboard:
Keywords:
Depends on:
Blocks:
 
Reported: 2024-03-11 03:14 UTC by xiaochenshen
Modified: 2024-04-22 15:34 UTC (History)
3 users (show)

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Description xiaochenshen intel_group 2024-03-11 03:14:07 UTC 
About Intel RDT non-contiguous CBM support:

GNR and SRF support L3/L2 non-contiguous way masks. Linux kernel changes is needed to support this.

Legacy RDT only support contiguous bits in L3/L2 CAT Cache Bit Mask (CBM) when allocating L3/L2 cache. For example, 0x111 is a valid bit mask but 0x101 is an invalid bit mask. This is limitation of legacy RDT hardware. It limits user's capability to allocate L3/L2 cache efficiently and cause poor performance.

With non-contiguous bits in L3/L2 CAT, we can allocate L3/L2 cache in various ways and utilize the cache efficiently and improve user application performance.


About the patches:
There are 4 backported upstream patches:
aaa5fa35743ab9f0726568611a85e3e15349b9bf Documentation/x86: Document resctrl's new sparse_masks
4dba8f10b8fef9c5b0f9ed83dd1af91a1795ead1 x86/resctrl: Add sparse_masks file in info
0e3cd31f6e9074886dea5a999bfcc563d144e7de x86/resctrl: Enable non-contiguous CBMs in Intel CAT
39c6eed1f61594f737160e498d29673edbd9eefd x86/resctrl: Rename arch_has_sparse_bitmaps
Comment 1 小龙 admin 2024-04-22 15:34:26 UTC 
The PR Link: https://gitee.com/anolis/cloud-kernel/pulls/3081